Alphabetic Trees Enumeration and Optimization with applications to VLSI design

Alphabetic trees are trees without any internal edge crossing despite an imposed total order on their leaf nodes This paper presents a systematic procedure for generating all alphabetic trees on a given number of leaf nodes under bounded degree and or bounded height criteria The number of such trees is calculated and used to derive upper bounds on the complexity of the corresponding alphabetic tree optimization problems A general alphabetic tree optimization procedure is then described that has a time complexity of O n for n leaf nodes It is shown that this complexity reduces to O n for the class of tree cost functions that satisfy certain properties i e satisfy subtree or subforest optimality conditions This is further reduced to O n t for a tree where the the degree of every internal node is upper bounded by t and to O n for a binary tree that satis es the monotonicity principle These results unify previous work on alphabetic tree optimization and show that the polynomial time alphabetic tree optimization algorithms apply to a larger class of tree cost functions than previously thought The proposed alphabetic tree generation mechanism is applied to problems in logic synthesis